COB ICs

                                              COB ICs
The quest to fabricate more and more devices in a minimum Silicon space has been ON since J. K and R. Noyce invented the first ICs. This quest has enabled scientific community to cross various technological frontiers. Sustained efforts to put more and more transistors on a wafer have led us to nanotechnologies.

 

In the commonly used electronic technology, the semiconductor chips (also known as bare-dice) are individually mounted on a package, and wire-bonded to its I/O pins. This package is then mounted on a Printed Circuit Board (PCB). However, not only does packaging of single chip ICs cost more than the cost of the chips they contain, packaging of a chip take relatively large amount of physical space. Using a conventional single chip package and circuit board interconnect strategy, the package and interconnects took up over 50% of the timing budget as well.

 

However, there is an emerging technology where several bare die chips are mounted on a single package. This technology is known as Multi-Chip Module (MCM) technology. It can be used for both standard and ASIC chips. The resulting package can then be soldered on a PCB.

 

Although different from MCM, Chip-on-Board (COB) and Flip-Chip technologies are generally considered as related technologies. In COB technology, a semiconductor chip is placed directly on a PCB, eliminating the packaging step thereby, COB comprises of bare dice on organic laminate substrates, such as FR4, along with other SMT devices, both packaged devices and discrete components.  

 

In the Flip-Chip technology, the chip is mounted upside-down (metal contacts down), providing a direct electrical connection to the I/O pads, eliminating the wirebonding step.

COB-RELATED TECHNOLOGIES

·                     Through hole PWB

In Through-hole technology, the leads on the components are inserted into pre-drilled holes on printed circuit boards on one side and then soldered to pads on opposite side of PCB. It utilizes PTH technology on rigid or flex laminate printed circuit board. Conductors are formed using copper tracks. Passive components are fixed using through hole packages.

Whilst there are exceptions, it is rare to see the use of leaded components and through hole PCBs in modern consumer electronics.

 

·                     Surface Mount Technology

In Surface mount technology (SMT) electronic circuits are assembled by mounting the active/passive components directly onto the surfaces (one or both sides) of printed circuit boards (PCBs).  SMT offers numerous benefits over Through-hole technology, e.g., suitable for automated machines, smaller physical size, less parasitic and low cost.

 

·                     Hybrid Technology

Hybrid circuit technology is an important method to enhance package density. A  hybrid circuit combines and interconnects several passive and active semiconductor devices into a single package. It uses following technologies

·     Thin film

In thin film technology, interconnects and tracks are deposited galvanically on the ceramic substrate whereas resistors and other passive components are added using printing and soldering techniques. Finally, chips are placed on the substrate using die bonders and the connections between chip and the substrate are done using wirebonding techniques. The substrates are often 99.5% alumina ceramic, silicon, or glass.

·     Thick film

The basic distinction between thick film and thin film is the method of deposition of the metallization.  Thick film is an additive process where layers of termination and resistor material are added to the substrate, while thin film is a subtractive process where the unwanted material is etched away in a succession of selective photo-etching processes.

In thick film technology, interconnects, tracks as well as resistors are created by printing pastes onto different levels of the substrates. The pastes are usually applied with a silk screen method on thick film substrates, such as Alumina, Aluminum nitride or Beryllium. The selected substrate is screen-printed with the conductor pattern and thick film resistors. Screen-printed resistors provide numerous benefits, including better tracking, improved interconnect reliability, and package design flexibility through size reduction. The printed paste is then fired in tightly monitored temperature controlled, multi-zoned furnaces, binding the paste to the base material and becoming an integral part of the circuit. Passive and active semi-conductor packages are then re-flowed onto the printed substrate. Bare dieare attached to the substrate with epoxy and interconnected with gold wire bonds. A variety of lids or coatings may be applied to protect the die and wire bonds.

 

Using hybrid technology, package density of a circuit with number of active and passive components can be several times higher than that of standard SMT.COB has got a lot of commonality with the Hybrid technology; the difference lies in the substrate material and in the packaging process. Hybrid Technology uses ceramics as the substrate whereas COB uses PCBs. In COB, bare die is encapsulated or glop topped whereas in hybrid technology, it is assembled in a package.

 

·                     Multichip module (MCM)

A Multi Chip Module (MCM) is an electronic system with two or more bare integrated circuits (bare die) assembled on a substrate. The substrate is either a PCB, a thick/thin film ceramic or silicon with an interconnection pattern. The substrate is either an integral part of the package or is mounted in a package.

 

Multichip Modules introduce a packaging level between ASICs and PCBs and there are  many reasons why this might be beneficial. Utilization of the active silicon area is about 15% for surface mounted circuits on a PCB compared to 30-60% for MCM. Other advantages are technology integration, reliability even in harsh environments, cost, etc.

 

In theory, there is no distinct difference between multichip module (MCM) and COB technologies. In practice, MCMs often use a smaller substrate and fewer active dies as compared with COB design. The three major technologies for MCM are MCMD, MCM-C, and MCM-L (-D, -C, and -L represent the different types of substrate materials). MCM- D provides substrate designs of the highest density since it uses thin film processes to deposit metals and dielectric layers on various rigid bases. MCM-C provides substrate designs of moderate density and uses thick film technology to form conductive patterns on ceramic materials. MCM-L uses laminate structures and employs PWB technology to form conductive patterns over reinforced dielectric laminates.

COB TECHNOLOGY

Chip-On-Board (COB) technology is very similar to MCM-L technology and has several advantages. It supports the use of both conventional soldered components and bare dies on a laminate dielectric substrate. It saves weight and volume compared to the conventional MCM technology with hermetic packages since it eliminates the intermediate substrate and pins of a MCM device.

 

When design parameters cannot be met by traditional assembly techniques, Chip-On-Board (COB) could be the solution. COB is an excellent choice for the miniaturization of your electrical circuit. In COB manufacturing, an unpackaged semiconductor die is attached directly onto the surface of a PCB substratealong with signal conditioning or support circuitry. Electrical connections are formed when the IC is attached to the corresponding substrate interconnects with wire bonding. A junction coating material (epoxy resin or a silicone coating) is then applied on top of the die to encapsulate and protect the die and wire bonds.  

COBs primary advantage is that it reduces the weight and mass of the circuit. When this is a primary concern, Chip-On-Board technology is the choice for circuit miniaturization solution.Using conventional printed wiring boards (PWBs) and standard wire bonding technology, COB technology can yield a factor of at least 10 in weight and volume saving. COB provides high packing density, quick turnaround, can be adapted to high frequencies, can mix standard assembly technologies and is applicable to most substrates. COB technology also reduces the thermal resistance and the number of interconnects between an active die and thesubstrate, which can potentially improve the overall circuit speed and the reliability of the design.This is a manufacturing solution that allows fast modification of existing product designs, even where space is at a premium.

 COB MANUFACTURING

1.                  Substrate

There are a host of materials that are used, each with slightly different cost and performance features. The most commonly used board material is glass weave impregnated with epoxy, described as Flame Retardant (FR) number 4, or FR-4.

Following table lists traditional board laminate materials and their general properties.

 

	Basic Composition	General Properties
FR-1	Phenolic/Kraft paper	Excellent punching at room temperature Poor wet electrical properties
FR-2		Punchable at room temperature Extremely poor wet electrical properties
FR-3		Brittle, but punchable with heat
FR-4	Epoxy/Glass fabric	High flex and impact strength Excellent electrical properties Excellent for PTH applications
FR-5	Modified Epoxy/Glass fabric	Improved hot flex strength over FR-4  Excellent electrical properties
FR-6	Polyester/Glass material	Outstanding electrical properties Punchable at room temperature Higher flex strength than paper products
CRM-5	Polyester/Glass fabric surface Polyester/Glass paper core	Outstanding electrical properties Punchable at room temperature Double flex strength of FR-6
CRM-7		Same properties as FR-6 Smoother surface finish
CEM-1		Outstanding electrical properties Punchable at room temperature Double flex strength of FR-6
CEM-3		Harder than CEM-1 Good electrical properties Suitable for PTH applications
G-10	Epoxy/Glass fabric Non-flame retardant	Same as FR4

 

As Teflon exhibits good performance at higher temperatures, it is preferred for high temperature applications. For applications where temperature variations are very high, polyurethane is preferred.

In COB, tracks are normal copper tracks, but the bond pads are made from a Copper base covered with a layer of nickel and on top of it, a fine layer of gold is used.

The bond surface must be free from all contaminants, should have no distortions and unevenness should be very small.

 

2.                  Die Bonding

For bonding the die on a substrate, adhesives like silver epoxy pastes are used. The bonding process requires curing (after application of paste) and degassing at high temperature (150° C).

For dissipation of heat, chips are bonded to metallic plates (which are finally connected to heat sinks/casing) integrated on board.

 

3.                  Interconnections

There are three main types of chip bonding techniques used in semiconductor manufacturing industry:

·                     Flip Chip

Flip-chip bonding offers lower cost, increases package density while maintaining or improving circuit reliability. The flip-chip process wherein chip is assembled face down is ideal for size considerations because there is no extra need for contacts on the sides of the components. Performance is better due to reduced connection path; reliability is good due to lesser number of connections.

 

Flip chip is a wafer scale operation as all bonds are made at a time. Bumps are formed on the entire wafer and the wafer is diced; individual die are picked, fluxed and placed on the substrate. The flux must hold the die in place for handling through reflow. The solder must be melted above its melting point to form the interconnections. Underfill and encapsulation complete the assembly.

Wirebonding of bare die onto a laminate substrate is referred to as COB (chip on board), flip chip attach of a bare die to a laminate substrate is referred to as DCA (direct chip attach), flip-chip/ACF (anisotropic conductive film) attach of a bare die onto glass/LCD panels is called Chip-on-glass (COG). 

 

·                     Tape Automated Bonding

Tape Automated Bonding uses a prefabricated carrier with copper leads adapted to the IC pads instead of single wires. The use of the term TCP (tape carrier package) has become a popular replacement for the term TAB

 

The metallurgy associated with TAB attach is complicated. The prefabricated carrier or tape consists of a perforated polyimide film. On this film is then glued a copper foil, and this copper is structured by photolithography like a flexible circuit. This process creates freestanding fingers in the tape openings, which are then soldered or welded to bumps previously created on the pads of the IC.

 

Tape may be removed afterwards. Ultimately, aluminum pads on the chip are attached to solder or gold pads on the substrate with a copper core lead frame going between them. The precise time-temperature-pressure conditions at which the joint is formed will influence the intermetallics that form and the resulting reliability

 

TAB was almost forgotten due to wide adoption of wirebonding in semiconductor industry. However, it offers the advantage of higher package density (pad size are smaller by a factor of 2) and the advantage is being utilized by LCD drivers.

·                     Wirebonding

Wirebonding is the technique most widely used in most of the chips & is used for interconnections between the bond pads on a chip and bond pads on a substrate in COB technology. Wirebonding is best described as single point unit operation. Each bond is individually produced. Flexibility, Infrastructure and Cost are the major advantages of wirebonding.

 

Two types of wirebonding, viz. aluminium wire bonding and gold wire bonding are used.

Sl. No	Aluminium wire bonding	Gold wire bonding
1	Aluminium wirebonding is a friction welding process. Two metals are pressed (at predefined pressure) against each other, then vibrations using ultrasonic energy are provided until friction bond occurs	Gold wire bonding is a thermocompression bonding wherein combination of heat, pressure and ultrasonic energy welds the gold ball to the aluminum die pad
2	It is a pure ultrasonic welding process done at room temperature	Bonding of acceptable quality requires temperature in excess of 120° C
3	Bonding time is almost three times to that of gold wire bonding due to requirement of ultrasonic energy and vacuum chuck to hold the substrate	Bonding time is relatively less
4	Bond pad requires a fine layer of 0.1 mm gold over nickel covered copper base.	Bond pad requires a fine layer of 1 to 2 mm gold over nickel covered copper base.
5	Bonding tool used is generally wedge	Bonding tool used is capillary
6	Manufacturing Cost is relatively less	Manufacturing Cost is higher due to amount of gold used,
7	Suitable for plastic packages	Suitable for ceramic packages using Si-Au eutectic die attach but not for plastic packages(due to high temperatures)

 

The following figure show Aluminium Wirebonding in a memory module fabricated using COB.

4.                  Encapsulation

Encapsulation is done to protect the chip from the outside world. In addition, the protective package provides the electrical connections to act as interface with external signals.

 

ICs are available commercially in standard packages. These packages have specific form factor and pin count. Standard packages are available commercially in a limited number of forms and the number of connecting pins is also standardized. This can mean that one is compelled to select a much larger package even if only one extra electrical connection is required, which increases the size and cost unnecessarily. Chips with over 100 pins usually require expensive packages and sometimes the package geometry makes bonding more difficult which can result in damaged die. Special ASICs are usually produced in only small quantities with a corresponding increase in the difficulty of selecting a suitable package. The greatest difficulties lie in manufacturing custom specific packages with the largest possible pin counts.

 

COB technology offers the best solution in this case as a specific board design with the requisite number of interconnections can be generated in a very short time.

 

After wire bonding, the chip and all the bonds are encapsulated. The resulting package is perfectly matched to the requirements and cannot easily be copied which is often an advantage where intellectual property needs to be protected. Another benefit is that passive components and/or other chips can be integrated into the same package.

 

The advantage of this packaging method is the miniaturization that would not be possible with standard packages that are often 10 or 20 times larger than the die themselves. Secondly the cost of the standard packages with high pin count ASICs is often higher than the cost of the die themselves.

 

When compared with SMT, finished product using COB (or Hybrid) technology requires lesser process steps. This is depicted in the following figure: 

 

COB ADVANTAGES

There are several areas where one or more of MCM/COB technologies can offer an advantage over alternative electronic technologies:

·                     Lower production cost

·                     Higher performance resulting from smaller circuit interconnection length

·                     Lower heat damage

·                     Shorter time-to-market

·                     Design flexibility

·                     Better protection against reverse-engineering

 

While most MCM technologies have a higher cost than alternative technologies, Chip-on-Board (COB) provides the cheapest form of mounted chip. Therefore, in applications where cost is an important issue, COB is now generally one of the preferred options. This is the case for consumer electronics, where for example, most hand-held inexpensive calculators are using COB technology.